Classification of Semiconductor Chip Aging Test
As chips enter markets such as automotive, cloud computing and the industrial Internet of Things, the reliability of chips is becoming a major concern for developers. Each end market has unique needs and characteristics, which affect the use method and conditions of the chip. And the use method and condition of the chip will cause other problems, such as aging and safety, which will cause a greater impact. Therefore, it is essensial to proceed the semiconductor chip aging test.
Definition of Chip Aging Test
Chip aging test is an electrical stress test method that uses voltage and high temperature to accelerate the electrical failure of devices. The burn-in process simulates running the chip for its entire life because the electrical stimuli applied during the burn-in process reflect the worst-case conditions of chip operation. According to different aging times, the obtained data’s reliability relates to the device’s early life or the degree of wear.
The ultimate goal of the chip aging test is to predict the product’s service life and evaluate or predict the durability of the product.
Classification of Chip Aging Test
Chip Packaging & Testing Aging Tests are Divided into Four Categories:
HTOL Test (High-temperature Working Life)
This test is used to predict long-term failure rates. The test conditions for high-temperature working life mainly follow the JESD22-A108 specification. In addition to proper bias and load for the device, there is also voltage stress. Under stress, dynamic signals are often applied to equipment, and parts are subjected to high temperatures under deviated operating conditions. The reasonable temperature and voltage stress setting can complete life evaluation in the shortest time and cost.
HTSL Test (High-temperature Storage Life Test)
HTSL: High-temperature storage life test (high-temperature storage life test) is a method to measure the reliability of IC and other products. With the different temperature conditions, the reference standard of IC products to maintain normal performance until the time before failure is not the same. Generally speaking, at 150°C, IC products need to maintain normal performance for more than 1000 hours. Under 175℃, IC products must maintain normal performance for more than 400 hours. Under 250℃, IC products must normally perform for more than 72 hours.
The measuring equipment is resistant to high-temperature environments simulating storage environments. The stress temperature is usually set at 125°C or 150°C to accelerate the effect of temperature on the specimen. During testing, no bias was applied to the device.
HAST Test (Highly Accelerated Stress Test)
The HAST test is a highly accelerated temperature and humidity stress test, a reliability test method for electronic components based on temperature and humidity. Its purpose is to evaluate test samples by increasing the water vapour pressure in the laboratory, which temporarily accelerates moisture infiltration into the sample. HAST is a rather extreme test. Under the condition of relative humidity of 80°C-85°C, the acceleration factor will be between tens and hundreds of times.
CSP Test (Reliability Test)
Due to its small size, an ordinary manipulator test cannot realize the chip test of the CSP package. CSP can only pass the method similar to the wafer test to support the electronic equipment they enter. Chips are directly tested with probe cards. After the test, dicing, sorting and packaging are carried out. During the test, the probe card is fixed on the probe station. The probe is directly stuck on the solder ball of the CSP package to realize the electrical connection. Then the testing machine tests the relevant parameters of the chip by applying voltage or waveform excitation through the wire.
However, this attractive size advantage also becomes fragile during the processing of CSP. Due to handling or insertion, cracking, cracking, and ball damage may result.
Chip Packaging & Testing Clips
The aging test of the chip is inseparable from the special shrapnel. It is the medium of the chip test contact, and the electronic components are connected to the conductive carrier. Through conductive contact, the operating data of the chip under the test link is obtained to judge whether the product’s data are normal.
To ensure product reliability, it is first necessary to reduce early failures. Potential defects in semiconductors are detected through the medium. When the device is subjected to voltage stress and heating while the device is running, the shrapnel starts to work, which makes the potential defects of the chip stand out in the process. The quality of shrapnel is very important to packaging and testing companies because it is directly related to whether the chip parameters are accurate during packaging and testing.
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